Senior IC Design Engineer

Job Title: Senior IC Design Engineer
Salary: Up to 120,000 CHf + package (relocation package if required)
Location: Bern, Switzerland (On-site role)
 
About The Role
 
Are you an experienced Digital IC Design Engineer looking for a new challenge with leading global semiconductor business? We are recruiting for an experienced Senior IC Design Engineer with experience in digital / mixed signal design.
 
Key Responsibilities
 

• Design and develop functional digital blocks, contributing to the creation of mixed-signal ASICs from initial definition through to full production.
• Assist the Product Definition team in conducting feasibility studies, defining product architecture, and designing digital blocks for FPGA emulation.
• Execute complete RTL design in SystemVerilog, ensuring all functional and specification requirements are met.
• Develop detailed block-level test benches for thorough verification of all digital blocks.
• Create behavioral models and top-level test benches for comprehensive verification, regression testing, and validation of system-level functions and production test functions.
• Conduct digital synthesis with appropriate physical constraints to meet the required Power, Performance, and Area (PPA) targets.
• Define and implement DFT (Design for Test) architecture, including scan insertion, ATPG (Automatic Test Pattern Generation), and insertion of test points to achieve adequate test coverage.
• Design the digital layout floorplan, manage digital place-and-route, and ensure successful post-layout timing closure.
• Produce all necessary design documentation and actively engage in design reviews.
• Contribute to the development of product-level verification and validation plans.
• Support silicon evaluation and product validation activities in collaboration with Product, Quality, and Test Engineering teams during production ramp-up.
• Contribute to continuous improvements in Technology Processes and Design Methodology.

 
Relevant Experience
 

• Degree in Electronics Engineering or a related field.
• Minimum of 6 years’ experience in digital IC design.
• Experience executing designs through a fully synthesized digital design flow, including RTL design and logic synthesis.
• Proficient in SystemVerilog and familiar with scripting languages such as TCL.
• Experienced with constraints and the automated place-and-route flow for physical design.
• Understanding of production test requirements, with experience using design methods (e.g., scan insertion) to maximize test coverage.
• Expertise in techniques for optimizing digital power consumption.
• Practical experience in debugging digital functions in a lab setting using tools like mixed-signal oscilloscopes.
• Skilled in producing accurate, thorough, and detailed documentation.